[RFC 2/4] irqchip, gicv3-its:Workaround for HiSilicon erratum 161010801

Shameerali Kolothum Thodi shameerali.kolothum.thodi at huawei.com
Wed Jan 25 02:30:00 PST 2017

> -----Original Message-----
> From: Mark Rutland [mailto:mark.rutland at arm.com]
> Sent: Tuesday, January 24, 2017 2:15 PM
> To: Shameerali Kolothum Thodi
> Cc: marc.zyngier at arm.com; will.deacon at arm.com; linux-arm-
> kernel at lists.infradead.org; Linuxarm; linux-kernel at vger.kernel.org;
> devicetree at vger.kernel.org; John Garry; Guohanjun (Hanjun Guo);
> robin.murphy at arm.com
> Subject: Re: [RFC 2/4] irqchip, gicv3-its:Workaround for HiSilicon
> erratum 161010801
sounds like this will have severe implications for virtualization.
> > Also these platforms doesn't have a proper IIDR
> > register to use the existing IIDR based quirk mechanism.
> What exactly is wrong with the IIDR on these platforms? That sounds
> like
> an erratum as of itself.
> What precise value do reads of the IIDR return? Or do reads result in
> other erroneous behaviour?

As far as I know, there is no erroneous behavior while reading.  But the
IIDR JEP106 identity code is 0 on these platforms, hence not much of use.

This will be corrected in next revision of hw.


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