CONFIG_PCIEASPM breaks PCIe on Marvell Armada 385 machine

Bjorn Helgaas helgaas at kernel.org
Tue Jan 17 10:14:58 PST 2017


On Tue, Jan 17, 2017 at 05:57:28PM +0000, Russell King - ARM Linux wrote:
> On Tue, Jan 17, 2017 at 05:51:16PM +0000, Russell King - ARM Linux wrote:
> > On Tue, Jan 17, 2017 at 11:46:49AM -0600, Bjorn Helgaas wrote:
> > > Uwe has already done that; the dmesg logs including this
> > > instrumentation are at
> > > https://bugzilla.kernel.org/show_bug.cgi?id=192441
> > 
> > Grr, <swears about SSL incompatibilities>... wget's the URL and then
> > uses elinks on it...
> > 
> > Umm, not quite.  He's done mvebu_pcie_hw_wr_conf() and mvebu_pcie_hw_rd_conf()
> > but not the bridge from the descriptions given on the attachments.
> > Obviously, it's going to be a lot of work to manufacture the links to
> > look at each attachment to thoroughly check, so I'm not going to do
> > that given quite how broken SSL crap is today.
> > 
> > (Try installing elinks and pointing it at the above URL.)
> 
> Oh, and looking at some of the debug that's been added:
> 
> [    3.646322] mvebu_pcie_rd_conf(where=16, size=4, val=3892314116) => 0
> [    3.646325] mvebu_pcie_wr_conf(where=16, size=4, val=4294967295)
> [    3.646329] mvebu_pcie_rd_conf(where=16, size=4, val=4292870148) => 0
> [    3.646332] mvebu_pcie_wr_conf(where=16, size=4, val=3892314116)
> 
> Please print register values in HEX, not decimal.  Same for register
> addresses.  Hex is the normal base to print this information, which
> the human brain can easily comprehend and translate to bits in a
> register.  Decimal values are useless and might as well be encrypted.

The instrumentation has evolved a bit since then.  Latest is below (could
still use improvement, but it does address your suggestions above):

https://bugzilla.kernel.org/attachment.cgi?id=251691 (CONFIG_PCIEASPM=y)
https://bugzilla.kernel.org/attachment.cgi?id=251701 (CONFIG_PCIEASPM not set)



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