[PATCH v7 6/6] arm64: dts: meson-axg: switch uart_ao clock to CLK81

Yixun Lan yixun.lan at amlogic.com
Thu Dec 14 17:49:11 PST 2017



On 12/15/17 00:47, Jerome Brunet wrote:
> On Mon, 2017-12-11 at 22:13 +0800, Yixun Lan wrote:
>> Switch the uart_ao pclk to CLK81 since the clock driver is ready.
>> Also move the clock info to the board.dts instead in the soc.dtsi.
> 
> Same comment as for ethmac, is it really wise ?
> Isn't the clock setup the same for the axg family ?
> 
HI Jerome:
yes, should be same for AXG family


HI Kevin:
could you take the patch [5/6]? then I just need to resend for this one


Yixun



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