[PATCH v2] PCI: dwc: designware: test PCIE_ATU_ENABLE bit to check enabled or not

[Bjorn Helgaas]

On Tue, Jul 18, 2017 at 02:48:21PM +0800, Jisheng Zhang wrote:
> The ATU CTRL2 register is 32 bit, besides the enable bit, other bits
> may also be set. To check whether the ATU is enabled or not, we should
> test the enable bit.
> 
> Signed-off-by: Jisheng Zhang <jszhang at marvell.com>
> Acked-by: Joao Pinto <jpinto at synopsys.com>

Applied with Jingoo's ack to pci/host-designware for v4.14, thanks!

> ---
> Since v1:
>  - Add Joao's Ack
>  - Fix typo in commit msg, thank Jingoo
> 
>  drivers/pci/dwc/pcie-designware.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c
> index 0e03af279259..6bf0b409050a 100644
> --- a/drivers/pci/dwc/pcie-designware.c
> +++ b/drivers/pci/dwc/pcie-designware.c
> @@ -177,7 +177,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
>  	 */
>  	for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) {
>  		val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
> -		if (val == PCIE_ATU_ENABLE)
> +		if (val & PCIE_ATU_ENABLE)
>  			return;
>  
>  		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
> -- 
> 2.13.2
> 
> 
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