[PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override

[Peter Chen]

>
>The board file for imx6sx-dbg overrides cpufreq operating points to use higher
>voltages. This is done because the board has a shared rail for VDD_ARM_IN and
>VDD_SOC_IN and when using LDO bypass the shared voltage needs to be a value
>suitable for both ARM and SOC.
>
>This was introduced in:
>
>commit 54183bd7f766 ("ARM: imx6sx-sdb: add revb board and make it default")
>
>This only only applies to LDO bypass mode, a feature not present in upstream. When
>LDOs are enabled the effect is to use higher voltages than necesarry for no good
>reason.
>
>Setting these higher voltages can make some boards fail to boot with ugly semi-
>random crashes, reminiscent of memory corruption. These failures happen the first
>time the lowest idle state is used. Remove the OPP override in order to fix those
>crashes.
>

Add Anson and Robin

This code has existed more than 2 years, it is strange why the bug has not reported both
for internal user and external user. I run upstream kernel using imx6sx-sdb revB very often
at recent years, but not meet this issue. How to trigger this unstable issue, anything needs
to change at u-boot?

Peter 

>Signed-off-by: Leonard Crestez <leonard.crestez at nxp.com>
>
>---
>It's not clear exactly why the crashes happen. Perhaps waking up from idle draws
>more power than is available? Removing this override is a correct change anyway so
>maybe there is no need to investigate deeper.
>
> arch/arm/boot/dts/imx6sx-sdb.dts | 17 -----------------
> 1 file changed, 17 deletions(-)
>
>diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
>index 5bb8fd5..d71da30 100644
>--- a/arch/arm/boot/dts/imx6sx-sdb.dts
>+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
>@@ -12,23 +12,6 @@
> 	model = "Freescale i.MX6 SoloX SDB RevB Board";  };
>
>-&cpu0 {
>-	operating-points = <
>-		/* kHz    uV */
>-		996000  1250000
>-		792000  1175000
>-		396000  1175000
>-		198000  1175000
>-		>;
>-	fsl,soc-operating-points = <
>-		/* ARM kHz      SOC uV */
>-		996000	1250000
>-		792000	1175000
>-		396000	1175000
>-		198000  1175000
>-	>;
>-};
>-
> &i2c1 {
> 	clock-frequency = <100000>;
> 	pinctrl-names = "default";
>--
>2.7.4