[PATCH] arm64: pmuv3: handle pmuv3+

Catalin Marinas catalin.marinas at arm.com
Tue Apr 25 10:13:54 EDT 2017


On Tue, Apr 25, 2017 at 03:05:39PM +0100, Will Deacon wrote:
> On Tue, Apr 25, 2017 at 12:08:50PM +0100, Mark Rutland wrote:
> > Commit f1b36dcb5c316c27 ("arm64: pmuv3: handle !PMUv3 when probing") is
> > a little too restrictive, and prevents the use of of backwards
> > compatible PMUv3 extenstions, which have a PMUver value other than 1.
> > 
> > For instance, ARMv8.1 PMU extensions (as implemented by ThunderX2) are
> > reported with PMUver value 4.
> > 
> > Per the usual ID register principles, at least 0x1-0x7 imply a
> > PMUv3-compatible PMU. It's not currently clear whether 0x8-0xe imply the
> > same.
> > 
> > For the time being, treat the value as signed, and with 0x1-0x7 treated
> > as meaning PMUv3 is implemented. This may be relaxed by future patches.
> > 
> > Signed-off-by: Mark Rutland <mark.rutland at arm.com>
> > Reported-by: Jayachandran C <jnair at caviumnetworks.com>
> > Cc: Will Deacon <will.deacon at arm.com>
> > ---
> >  arch/arm64/kernel/perf_event.c | 7 ++++---
> >  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> Acked-by: Will Deacon <will.deacon at arm.com>
> 
> > Will, would you be happy to queue this fixup for v4.12?
> 
> Catalin: please can you pick this up via arm64 with my Ack and
> Jayachandran's tested-by?

Done. Thanks.

-- 
Catalin



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