[PATCH 4/7] arm64: marvell: dts: add crypto engine description for 7k/8k
Antoine Tenart
antoine.tenart at free-electrons.com
Tue Apr 18 03:34:18 EDT 2017
Hi Thomas,
On Wed, Apr 12, 2017 at 10:56:08AM +0200, Thomas Petazzoni wrote:
> On Wed, 29 Mar 2017 14:44:29 +0200, Antoine Tenart wrote:
>
> > + cpm_crypto: crypto at 800000 {
> > + compatible = "inside-secure,safexcel-eip197";
> > + reg = <0x800000 0x200000>;
> > + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>,
>
> Now that I look into this, does it makes sense for an interrupt to be
> both an edge interrupt and a level interrupt at the same time? This
> looks odd.
I agree this looks odd. I took it from Russel's ICU mapping:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-February/489040.html
Also note the driver does not use it (yet?).
Antoine
--
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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