[PATCH 3/8] ARM: dts: imx7s: Adjust anatop-enable-bit for 'reg_1p0d'

[Shawn Guo]

On Thu, Apr 13, 2017 at 06:32:37AM -0700, Andrey Smirnov wrote:
> In PMU_REG_1P0Dn ENABLE_LINREG is bit 0. Bit 31 is called OVERRIDE and
> it serves the function of granting permission to GPC IP block to alter
> various bit-fields of the register. The reason why this property, that
> trickeld here from Freescale BSP, is set to 31 is because in the code
> it came from it is used in conjunction with a notifier handler for
> REGULATOR_EVENT_PRE_DO_ENABLE and REGULATOR_EVENT_PRE_DO_DISABLE
> events (not found in upstream kernel) that triggers GPC to start
> manipulating aforementioned other bitfields.
> 
> Since:
> 	a) none of the aforementioned machinery is implemented by
> 	   upstream
> 	b) using 'anatop-enable-bit' in that capacity is a bit of a
> 	   semantic stretch
> 
> simplify the situation by setting the value of 'anatop-enable-bit' to
> point to ENABLE_LINREG (same as i.MX6).
> 
> Cc: yurovsky at gmail.com
> Cc: Sascha Hauer <kernel at pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam at nxp.com>
> Cc: Rob Herring <robh+dt at kernel.org>
> Cc: Mark Rutland <mark.rutland at arm.com>
> Cc: Russell King <linux at armlinux.org.uk>
> Cc: devicetree at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Cc: linux-arm-kernel at lists.infradead.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>

Since patch 1 ~ 3 are all about adding anatop-enable-bit, can we squash
them into one patch?

Shawn

> ---
>  arch/arm/boot/dts/imx7s.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
> index 22c9788..8fee299 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -516,7 +516,7 @@
>  					anatop-min-bit-val = <8>;
>  					anatop-min-voltage = <800000>;
>  					anatop-max-voltage = <1200000>;
> -					anatop-enable-bit = <31>;
> +					anatop-enable-bit = <0>;
>  				};
>  			};
>  
> -- 
> 2.9.3
>