[PATCH v2 1/2] clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
Stephen Boyd
sboyd at codeaurora.org
Wed Apr 5 14:52:18 PDT 2017
On 03/16, gabriel.fernandez at st.com wrote:
> From: Gabriel Fernandez <gabriel.fernandez at st.com>
>
> 0000: PLLQ = 0, wrong configuration
> 0001: PLLQ = 1, wrong configuration
> ...
> 0010: PLLQ = 2
> 0011: PLLQ = 3
> 0100: PLLQ = 4
> ...
> 1111: PLLQ = 1
>
> Use divider table to exclude 0 and 1 values.
>
> Fixes: 83135ad3c517 ("clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards")
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez at st.com>
> ---
Applied to clk-fixes
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