Alignment issues with freescale FEC driver

Andrew Lunn andrew at lunn.ch
Fri Sep 23 11:13:01 PDT 2016


> Since the hardware requires longword alignment for its' DMA transfers,
> aligning the IP header will require a memcpy, right?

The vf610 FEC has an SHIFT16 bit in register ENETx_TACC, which inserts
two padding bits on transmit. ENETx_RACC has the same.

What about your hardware?

     Andrew



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