[PATCH v4 2/3] arm64: dts: Add ZTE ZX296718 SoC dts and Makefile

Shawn Guo shawnguo at kernel.org
Mon Sep 12 05:14:39 PDT 2016


On Mon, Sep 12, 2016 at 03:13:58PM +0800, Jun Nie wrote:
> PLL clocks can be configured actually according to register. But I
> prefer to keep them as fixed clocks due to two reasons:
>  1. ZTE do not want to expose too much information of PLL.
>  2. All clients blocks, such as MMC and video codec, assume the
> related input clock's frequency as a derivation from PLL default
> frequency value in block clock control register description.

Okay, just try to understand the reason behind it.  Thanks.

Shawn



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