[PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching

[Kees Cook]

On Fri, Sep 9, 2016 at 9:31 AM, Mark Rutland <mark.rutland at arm.com> wrote:
> On Thu, Sep 08, 2016 at 01:51:24PM +0100, Catalin Marinas wrote:
>> On Wed, Sep 07, 2016 at 04:20:55PM -0700, Kees Cook wrote:
>> > On Fri, Sep 2, 2016 at 8:02 AM, Catalin Marinas <catalin.marinas at arm.com> wrote:
>> > > This is the second version of the arm64 PAN emulation by disabling
>> > > TTBR0_EL1 accesses. The major change from v1 is the use of a thread_info
>> > > member to store the real TTBR0_EL1 value. The advantage is slightly
>> > > simpler assembler macros for uaccess_enable with the downside that
>> > > switch_mm() must always update the saved ttbr0 even if there is no mm
>> > > switch.
>> >
>> > Is arm64 thread_info attached to the kernel stack? (i.e. is this
>> > introducing a valuable target for stack-based attacks?)
>>
>> Currently yes, thread_info is on the kernel stack. At some point we'll
>> decouple it in a similar way to what x86 are doing/planning.
>
> FWIW, I'm currently working on this (atop of Andy's x86 patches). The
> IRQ stack work largely removed out dependence on the stack pointer to
> find thread_info, and I have a plan for the remaining places.
>
> There's a fair amount of ground work to do first (e.g. reworking headers
> to avoid circular dependencies), but hopefully I'll have something that
> I can share soon.

Fantastic! Thanks for the heads-up. :)

-Kees

-- 
Kees Cook
Nexus Security