[PATCH v5 1/7] ARM: dts: r8a7743: initial SoC device tree

[Geert Uytterhoeven]

Hi Sergei,

On Thu, Oct 27, 2016 at 11:36 PM, Sergei Shtylyov
<sergei.shtylyov at cogentembedded.com> wrote:
> The  initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST,
> CPG, and the required clock descriptions.
>
> Based on the original (and large) patch by Dmitry Shifrin
> <dmitry.shifrin at cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov at cogentembedded.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
>
> ---
> Changes in version 5:
> - added the RST device node, updated the patch description accordingly.

Thanks for the update!

> +++ renesas/arch/arm/boot/dts/r8a7743.dtsi
> @@ -0,0 +1,120 @@

> +               rst: reset-controller at e6160000 {
> +                       compatible = "renesas,r8a7743-rst";
> +                       reg = <0 0xe6160000 0 0x0200>;

I'd use "reg = <0 0xe6160000 0 0x0100>".
Only R-Car Gen3 has registers above offset 0x100.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds