[PATCH v2] mtd: nand: Add OX820 NAND Support

[Boris Brezillon]

On Thu, 20 Oct 2016 10:49:01 +0200
Neil Armstrong <narmstrong at baylibre.com> wrote:

> Add NAND driver to support the Oxford Semiconductor OX820 NAND Controller.
> This is a simple memory mapped NAND controller with single chip select and
> software ECC.
> 
> Acked-by: Rob Herring <robh at kernel.org>
> Signed-off-by: Neil Armstrong <narmstrong at baylibre.com>
> ---
>  .../devicetree/bindings/mtd/oxnas-nand.txt         |  41 +++++
>  drivers/mtd/nand/Kconfig                           |   5 +
>  drivers/mtd/nand/Makefile                          |   1 +
>  drivers/mtd/nand/oxnas_nand.c                      | 196 +++++++++++++++++++++
>  4 files changed, 243 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/oxnas-nand.txt
>  create mode 100644 drivers/mtd/nand/oxnas_nand.c
> 
> Changes since v1 http://lkml.kernel.org/r/20161019145523.6763-1-narmstrong@baylibre.com :
>  - Simplify cmd_ctrl command and drop the ctrl address offset
>  - Change oxnas_nand struct name to oxnas_nand_ctrl
>  - Update DT-Bindings example to reflect the ctrl->chip->partitions hierarchy
> 
> Changes since RFC http://lkml.kernel.org/r/20161018090927.1990-1-narmstrong@baylibre.com :
>  - Avoid using chip->IO_ADDR*
>  - Use new DT structure
>  - Assign a chip for the subnode
>  - Use the nand_hw_control structure
>  - Cleanup probe
>  - Cleanup cmd_ctrl by using a context ctrl offset used in write_bytes
> 
> diff --git a/Documentation/devicetree/bindings/mtd/oxnas-nand.txt b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> new file mode 100644
> index 0000000..33a77b8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> @@ -0,0 +1,41 @@
> +* Oxford Semiconductor OXNAS NAND Controller
> +
> +Please refer to nand.txt for generic information regarding MTD NAND bindings.
> +
> +Required properties:
> + - compatible: "oxsemi,ox820-nand"
> + - reg: Base address and length for NAND mapped memory.
> +
> +Optional Properties:
> + - clocks: phandle to the NAND gate clock if needed.
> + - resets: phandle to the NAND reset control if needed.
> +
> +Example:
> +
> +nand: nand-controller at 41000000 {

'nandc:' or 'nand_ctrl:'

Otherwise it may conflict with a NAND chip alias.
The rest looks good, so no need to send a new version (I can fix it when
applying the patch).

One last thing, I saw there was other people owning boards with this
controller. Can I get one or two Tested-by?

Thanks taking my reviews into account.

Regards,

Boris