[PATCH v2] sdhci-esdhc-imx: Correct two register accesses

[Adrian Hunter]

On 10/10/16 21:39, Aaron Brice wrote:
>  - The DMA error interrupt bit is in a different position as
>    compared to the sdhci standard.  This is accounted for in
>    many cases, but not handled in the case of clearing the
>    INT_STATUS register by writing a 1 to that location.
>  - The HOST_CONTROL register is very different as compared to
>    the sdhci standard.  This is accounted for in the write
>    case, but not when read back out (which it is in the sdhci
>    code).
> 
> Signed-off-by: Dave Russell <david.russell at datasoft.com>
> Signed-off-by: Aaron Brice <aaron.brice at datasoft.com>
> Acked-by: Dong Aisheng <aisheng.dong at nxp.com>

Acked-by: Adrian Hunter <adrian.hunter at intel.com>