[PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
Lokesh Vutla
lokeshvutla at ti.com
Tue Oct 4 06:11:00 PDT 2016
On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote:
> The default impedance settings of the phy is not the optimal
> value, due to this the second ethernet is not working. Fix it
> with correct values which makes the second ethernet port to work.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm at ti.com>
> ---
> arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
> index f9cfd3b..d626cd7 100644
> --- a/arch/arm/boot/dts/dra72-evm-revc.dts
> +++ b/arch/arm/boot/dts/dra72-evm-revc.dts
> @@ -62,6 +62,7 @@
> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> + ti,min-output-imepdance;
s/imepdance/impedance
> };
>
> dp83867_1: ethernet-phy at 3 {
> @@ -69,5 +70,6 @@
> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> + ti,min-output-imepdance;
same here.
Thanks and regards,
Lokesh
> };
> };
>
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