[PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre_count atomic
Sinan Kaya
okaya at codeaurora.org
Sat Oct 1 08:19:43 PDT 2016
On 10/1/2016 2:19 AM, Vinod Koul wrote:
>> Making it atomic so that it can be updated from multiple contexts.
> How is it multiple contexts? It's either existing context of MSI, not both!
>
I was trying to mean multiple processor contexts here. The driver allocates 11
MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then,
we have a race condition for common variables as they share the same interrupt
handler with a different cause bit.
I will put the above description into the commit text.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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