[PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table

[Jon Hunter]

On 27/10/16 15:01, Mirza Krak wrote:
> From: Mirza Krak <mirza.krak at gmail.com>
>
> Add TEGRA20_CLK_NOR to init table and set default rate to 92 MHz which
> is max rate.
>
> The maximum rate value of 92 MHz is pulled from the downstream L4T
> kernel.
>
> Signed-off-by: Mirza Krak <mirza.krak at gmail.com>
> Tested-by: Marcel Ziswiler <marcel.ziswiler at toradex.com>
> Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board

Acked-by: Jon Hunter <jonathanh at nvidia.com>

Cheers
Jon

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