[PSCI DISCUSS] How to implement standby and suspend-to-ram by PSCI
hongbo.zhang at nxp.com
Thu May 19 03:27:41 PDT 2016
> -----Original Message-----
> From: Oliver Neukum [mailto:oneukum at suse.com]
> Sent: Tuesday, May 17, 2016 7:54 PM
> To: Hongbo Zhang <hongbo.zhang at nxp.com>
> Cc: Sudeep Holla <sudeep.holla at arm.com>; linux-pm at vger.kernel.org;
> Lorenzo Pieralisi <lorenzo.pieralisi at arm.com>; Marc Zyngier
> <marc.zyngier at arm.com>; Jan Kiszka <jan.kiszka at siemens.com>; Mark
> Rutland <mark.rutland at arm.com>; Daniel Lezcano
> <daniel.lezcano at linaro.org>; Chen-Yu Tsai <wens at csie.org>; Hans de Goede
> <hdegoede at redhat.com>; Frank Li <Frank.Li at freescale.com>; Peng Fan
> <Peng.Fan at freescale.com>; Tom Warren <twarren at nvidia.com>; Vincent
> Guittot <vincent.guittot at linaro.org>; jszhang at marvell.com; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PSCI DISCUSS] How to implement standby and suspend-to-ram by
> On Thu, 2016-05-12 at 09:42 +0000, Hongbo Zhang wrote:
> > On our platform we have some shallow states which maps to cpuidle
> > well,
> > and we have two more deeper states:
> > Sleep state:
> > All cores are in WFI state,
> > Core cluster is in standby state, e.g. L2 cache is flushed then stops
> > snooping,
> > Only those modules which are required to wake up the device still have
> > a
> > running clock, other device modules in chip are clock gated.
> > Deep sleep state:
> > ARM cores and DDR controller are switched off,
> > DDR is in self-refresh mode,
> > VDD power to off domain IPs are removed, Only the blocks needed to
> > detect wake up and sequence the chip out of deep sleep are on.
> For the pm module of the core kernel a low power state is a sleep
> state if even one of three conditions is met:
> a) a device that can be used for input is not a source of wake ups
> b) tasks need to be frozen to enter it
> c) the display goes off, while it should be on
> Generally runtime PM is better if you can get the same results.
> Going to a system sleep state is a necessary evil.
As I just explained in previous reply, many devices in our Soc cannot be physically clock or power gated, all the non-wakeup devices can only be gated off at same time by a PM module, so runtime PM doesn't fit for us well.
Thanks for your advice.
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