[PATCH v3] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum
Marc Zyngier
marc.zyngier at arm.com
Thu May 5 09:39:37 PDT 2016
On 05/05/16 17:32, Ray Jui wrote:
> Alex Barba <alex.barba at broadcom.com> discovered Broadcom NS2 GICv2m
> implementation has an erratum where the MSI data needs to be the SPI
> number subtracted by an offset of 32, for the correct MSI interrupt
> to be triggered.
>
> Here we are adding the workaround based on readings from the MSI_IIDR
> register, which contains a value unique to Broadcom NS2 GICv2m
>
> Reported-by: Alex Barba <alex.barba at broadcom.com>
> Signed-off-by: Ray Jui <ray.jui at broadcom.com>
Acked-by: Marc Zyngier <marc.zyngier at arm.com>
I'll queue that for 4.7.
Thanks,
M.
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Jazz is not dead. It just smells funny...
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