[PATCH v8] acpi, apei, arm64: APEI initial support for aarch64.

[Will Deacon]

On Tue, Mar 29, 2016 at 03:44:18PM +0800, fu.wei at linaro.org wrote:
> From: Tomasz Nowicki <tomasz.nowicki at linaro.org>
> 
> This commit provides APEI arch-specific bits for aarch64
> 
> Meanwhile,
> (1)add a new subfunction "hest_ia32_init" for
> "acpi_disable_cmcff" which is used by IA-32 Architecture
> Corrected Machine Check (CMC).
> (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
> a generic place.
> (3)select EFI when ACPI_APEI is set on ARM64,
> because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
> 
> [Fu Wei: improve && upstream]
> 
> Signed-off-by: Tomasz Nowicki <tomasz.nowicki at linaro.org>
> Tested-by: Jonathan (Zhixiong) Zhang <zjzhang at codeaurora.org>
> Signed-off-by: Fu Wei <fu.wei at linaro.org>
> Acked-by: Hanjun Guo <hanjun.guo at linaro.org>
> Tested-by: Tyler Baicar <tbaicar at codeaurora.org>
> ---
> Changelog:
> v8: Fix a "undefined reference" bug by selecting EFI when ACPI_APEI is set
>     on ARM64.
> 
> v7: https://lkml.org/lkml/2016/3/17/183
>     Add comment for arch_apei_flush_tlb_one in arch/arm64/include/asm/acpi.h
> 
> v6: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006644.html
>     Move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>     a generic place.
>     Delete HAVE_ACPI_APEI_HEST_IA32.
> 
> v5: https://lkml.org/lkml/2015/12/10/131
>     Add "HAVE_ACPI_APEI_HEST_IA32" instead of
>     "#if defined(__i386__) || defined(__x86_64__)".
> 
> v4: https://lkml.org/lkml/2015/12/8/188
>     Rebase to latest kernel version(4.4-rc4).
>     Move arch_apei_flush_tlb_one into header file as a inline function
>     Add a new subfunction "hest_ia_init" for "acpi_disable_cmcff".
> 
> v3: https://lkml.org/lkml/2015/12/3/521
>     Remove "acpi_disable_cmcff" from arm64 code,
>     and wrap it in hest.c by "#if defined(__i386__) || defined(__x86_64__)"
> 
> v2: https://lkml.org/lkml/2015/12/2/432
>     Rebase to latest kernel version(4.4-rc3).
>     Move arch_apei_flush_tlb_one() to arch/arm64/kernel/acpi.c
> 
> v1: https://lkml.org/lkml/2015/8/14/199
>     Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
>     Delete arch/arm64/kernel/apei.c.
>     Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
> 
>  arch/arm64/Kconfig            |  1 +
>  arch/arm64/include/asm/acpi.h | 15 ++++++++++++++-
>  arch/x86/kernel/acpi/apei.c   |  3 ---
>  drivers/acpi/apei/Kconfig     |  1 +
>  drivers/acpi/apei/hest.c      | 18 +++++++++++++++---
>  5 files changed, 31 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 4f43622..08952ec 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -3,6 +3,7 @@ config ARM64
>  	select ACPI_CCA_REQUIRED if ACPI
>  	select ACPI_GENERIC_GSI if ACPI
>  	select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> +	select HAVE_ACPI_APEI if ACPI
>  	select ARCH_HAS_DEVMEM_IS_ALLOWED
>  	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>  	select ARCH_HAS_ELF_RANDOMIZE
> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
> index aee323b..4a6c959 100644
> --- a/arch/arm64/include/asm/acpi.h
> +++ b/arch/arm64/include/asm/acpi.h
> @@ -17,6 +17,7 @@
>  
>  #include <asm/cputype.h>
>  #include <asm/smp_plat.h>
> +#include <asm/tlbflush.h>
>  
>  /* Macros for consistency checks of the GICC subtable of MADT */
>  #define ACPI_MADT_GICC_LENGTH	\
> @@ -110,7 +111,19 @@ static inline const char *acpi_get_enable_method(int cpu)
>  }
>  
>  #ifdef	CONFIG_ACPI_APEI
> +#define acpi_disable_cmcff 1
>  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
> -#endif
>  
> +/*
> + * This inline function is used in IRQ context (by GHES driver now),
> + * see ghes_iounmap_irq and ghes_iounmap_nmi in drivers/acpi/apei/ghes.c.
> + * The page mapped is reserved for firmware in kernel. This invalidate TLB
> + * maintenance should be broadcasted safely to make sure that all the cores
> + * will do TLB invalidation, then get the right pages.
> + */

How about:

 /*
  * Despite its name, this function must still broadcast the TLB
  * invalidation in order to ensure other CPUs don't up with with junk
  * entries as a result of speculation. Unusually, its also called in
  * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
  * TLB broadcasting, then we're in trouble here.
  */

With that,

Acked-by: Will Deacon <will.deacon at arm.com>

Will