[PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding

[Rob Herring]

On Tue, Mar 01, 2016 at 10:38:18AM -0600, tthayer at opensource.altera.com wrote:
> From: Thor Thayer <tthayer at opensource.altera.com>
> 
> Add the device tree binding string needed to support the Altera L2
> cache on the Arria10 chip.
> 
> Signed-off-by: Thor Thayer <tthayer at opensource.altera.com>
> ---
>  .../bindings/arm/altera/socfpga-eccmgr.txt         |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <robh at kernel.org>