[PATCH 07/13] ARM: dts: r8a7792: initial SoC device tree

Sergei Shtylyov sergei.shtylyov at cogentembedded.com
Mon Jun 13 04:24:58 PDT 2016

On 6/13/2016 10:12 AM, Geert Uytterhoeven wrote:

>>>>    The only problem I'm seeing (again) is the RCAN clock failing to
>>>> register:
>>>> rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12)
>>>>    I was going to look at it yesterday but (wrongly) thought it somehow
>>>> cured itself... I'll look at it now.
>>> The RCAN parent is the second clock in the CPG node's "clocks" property,
>>> which you didn't provide.
>>    Actually, the things are more complex. The figure 7.1c suggests that the
>> RCAN clock has different parent on R8A7792 than on the other SoCs -- namely
>> PLL1/VCO 1/4. That may be, since there's just no USB_EXTAL signal on this
>> SoC (it doesn't seem to support any USB IPs). Which means the
>> 'clk-rcar-gen2' driver can't work with the RCAN clock in its current form.
> Right, I had forgotten about that.
> Fortunately the clk-rcar-gen2 driver has a sane failure mode for this case ;-)

    What do you mean?

> it seems the RCAN clock can just be modeled as a fixed clock. However,
> its divider value isn't clear to me,

    IIRC, the fixed RCAN divisor was equal to 6.


> Gr{oetje,eeting}s,
>                         Geert

MBR, Sergei

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