[PATCH 1/3] dt-bindings: add DT binding for the Aardvark PCIe controller
Arnd Bergmann
arnd at arndb.de
Thu Jun 2 02:35:38 PDT 2016
On Thursday, June 2, 2016 11:09:43 AM CEST Thomas Petazzoni wrote:
> + ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
> + 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
>
Any reason for not having a 64-bit MEM prefetchable area in the example?
Does the host not support that?
Arnd
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