[PATCH 2/3] mmc: sunxi: Set the 'New Timing' register for 8 bits DDR transfers
Jean-Francois Moine
moinejf at free.fr
Fri Jul 29 22:20:02 PDT 2016
On Fri, 29 Jul 2016 21:36:34 +0200
Maxime Ripard <maxime.ripard at free-electrons.com> wrote:
> On Thu, Jul 21, 2016 at 11:26:55AM +0200, Jean-Francois Moine wrote:
> > On Thu, 21 Jul 2016 10:56:15 +0200
> > Maxime Ripard <maxime.ripard at free-electrons.com> wrote:
> >
> > > On Wed, Jul 20, 2016 at 08:16:28PM +0200, Jean-Francois Moine wrote:
> > > > The 'new timing mode' with 8 bits DDR works correctly when the NewTiming
> > > > register is set.
> > >
> > > What does that mode brings to the table?
> >
> > From my tests, the eMMC of the Banana Pi M3 (A83T) cannot work when the
> > new mode is not used.
>
> That's odd. The one in the Pine64 seems to work just fine, and yet
> there's only the new mode on the A64.
I spent 2 weeks on this problem. You may try it by yourself.
--
Ken ar c'hentañ | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
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