[PATCH 4/6] arm64: dts: qcom: msm8916: Add tcsr syscon
Bjorn Andersson
bjorn.andersson at linaro.org
Fri Jul 15 17:42:14 PDT 2016
The TCSR memory segment includes various functionality, among other
things the halt-registers for the Hexagon.
Signed-off-by: Bjorn Andersson <bjorn.andersson at linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 1e67acc19a9d..64f85f82602c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -234,6 +234,11 @@
reg = <0x1905000 0x20000>;
};
+ tcsr: syscon at 1937000 {
+ compatible = "qcom,tcsr-msm8916", "syscon";
+ reg = <0x1937000 0x30000>;
+ };
+
tcsr_mutex: hwlock {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_regs 0 0x1000>;
--
2.5.0
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