PCIe MSI address is not written at pci_enable_msi_range call

Bharat bharatku at xilinx.com
Sun Jul 10 22:55:09 PDT 2016


Hi, 

I have a query.
I see that when we use PCI_MSI_IRQ_DOMAIN to handle MSI's, MSI address is
not being written in to end point's PCI_MSI_ADDRESS_LO/HI at the call
pci_enable_msi_range.

Instead it is being written at the time end point requests irq.

Can any one tell the reason why is it handled in this manner ?

Correct me If my observation is wrong.

Thanks & Regards,
Bharat





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