[PATCH 2/2] arm-cci: ensure perf synchronisation

[Will Deacon]

On Tue, Jun 28, 2016 at 06:50:18PM +0100, Mark Rutland wrote:
> Currently the IRQ core is permitted to make the CCI PMU IRQ handler
> threaded, and will allow userspace to change the CPU affinity of the
> interrupt behind our back. Both of these could violate our
> synchronisation requirements with the core perf code, which relies upon
> strict CPU affinity and disabling of interrupts to guarantee mutual
> exclusion in some cases.

Minor nit, but I think $subject is particularly unhelpful for these two
patches. How about "arm-ccX: fix PMU interrupt flags"?

> As with the CPU PMU drivers, we should request the interrupt with
> IRQF_NOBALANCING and IRQF_NO_THREAD, to avoid these issues.
> 
> Signed-off-by: Mark Rutland <mark.rutland at arm.com>
> Cc: Marc Zyngier <marc.zyngier at arm.com>
> Cc: Punit Agrawal <punit.agrawal at arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
> Cc: Will Deacon <will.deacon at arm.com>
> Cc: Olof Johansson <olof at lixom.net>
> Cc: Arnd Bergmann <arnd at arndb.de>
> Cc: <arm at kernel.org>
> ---
>  drivers/bus/arm-cci.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
> index a49b283..6a8825a 100644
> --- a/drivers/bus/arm-cci.c
> +++ b/drivers/bus/arm-cci.c
> @@ -881,7 +881,8 @@ static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler)
>  	 * This should allow handling of non-unique interrupt for the counters.
>  	 */
>  	for (i = 0; i < cci_pmu->nr_irqs; i++) {
> -		int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED,

Why is this shared and who is the line shared with? We should check that
we don't have contradictory IRQ flags in the other irq request path(s).

Will