[PATCH v2 1/4] ARM: dts: imx7d: add arch timer
Zhi Li
lznuaa at gmail.com
Thu Jan 21 14:39:14 PST 2016
On Tue, Jan 5, 2016 at 11:17 AM, Frank Li <Frank.Li at nxp.com> wrote:
> From: Frank Li <Frank.Li at freescale.com>
>
> Since uboot v2016.01-rc2, which supported basic psci for i.mx7d.
> So imx7d's second core can be enabled by psci.
>
> Without arch timer, every timer event will be boardcasted to each core.
> arch timer has local timer irq for each core.
>
> Signed-off-by: Frank Li <Frank.Li at freescale.com>
> ---
Ping
>
> Change from v1 to v2:
> * refine commit message show the relationship between smp and arch timer
>
> arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
> index 489604a..a621af6 100644
> --- a/arch/arm/boot/dts/imx7d.dtsi
> +++ b/arch/arm/boot/dts/imx7d.dtsi
> @@ -119,6 +119,15 @@
> clock-output-names = "osc";
> };
>
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + interrupt-parent = <&intc>;
> + };
> +
> etr at 30086000 {
> compatible = "arm,coresight-tmc", "arm,primecell";
> reg = <0x30086000 0x1000>;
> --
> 2.5.2
>
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