[PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc

[Rob Herring]

On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote:
> The CRG(Clock and Reset Generator) block provides clock
> and reset signals for other modules in hi3519 soc.
> 
> Signed-off-by: Jiancheng Xue <xuejiancheng at huawei.com>
> ---
>  .../devicetree/bindings/clock/hi3519-crg.txt       |  46 +++++++

I already acked this. Please add ack's when posting new versions.

Acked-by: Rob Herring <robh at kernel.org>

>  drivers/clk/hisilicon/Kconfig                      |   7 ++
>  drivers/clk/hisilicon/Makefile                     |   2 +
>  drivers/clk/hisilicon/clk-hi3519.c                 | 132 +++++++++++++++++++++
>  drivers/clk/hisilicon/clk.c                        |  23 ++--
>  drivers/clk/hisilicon/clk.h                        |  14 +--
>  drivers/clk/hisilicon/reset.c                      | 130 ++++++++++++++++++++
>  drivers/clk/hisilicon/reset.h                      |  32 +++++
>  include/dt-bindings/clock/hi3519-clock.h           |  40 +++++++
>  9 files changed, 411 insertions(+), 15 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt
>  create mode 100644 drivers/clk/hisilicon/clk-hi3519.c
>  create mode 100644 drivers/clk/hisilicon/reset.c
>  create mode 100644 drivers/clk/hisilicon/reset.h
>  create mode 100644 include/dt-bindings/clock/hi3519-clock.h