CONFIG_CPU_SW_DOMAIN_PAN breakage on ARM11 MPCore
Felix Fietkau
nbd at openwrt.org
Tue Jan 19 07:38:02 PST 2016
On 2016-01-19 16:27, Arnd Bergmann wrote:
> On Tuesday 19 January 2016 10:53:26 Felix Fietkau wrote:
>> root at OpenWrt:~# cat /proc/cpuinfo
>> processor : 0
>> model name : ARMv6-compatible processor rev 4 (v6l)
>> BogoMIPS : 238.38
>> Features : half thumb fastmult vfp edsp java tls
>> CPU implementer : 0x41
>> CPU architecture: 7
>> CPU variant : 0x0
>> CPU part : 0xb02
>> CPU revision : 4
>>
>> processor : 1
>> model name : ARMv6-compatible processor rev 4 (v6l)
>> BogoMIPS : 239.61
>> Features : half thumb fastmult vfp edsp java tls
>> CPU implementer : 0x41
>> CPU architecture: 7
>> CPU variant : 0x0
>> CPU part : 0xb02
>> CPU revision : 4
>
> I guess this means you run with the SMP patches from OpenWRT,
> while upstream only supports uniprocessor mode and presumably doesn't
> have this problem, right?
I tested without SMP and ran into the same user space hangs/crashes.
> I see that Oxnas (supported in OpenWRT but not upstream) has the
> slightly newer ARM11mpcore variant 0 / revision 5 ID. Is it easy for
> you to test if this has the same problem?
I already spoke to Daniel (who maintains that target), and it is equally
affected.
> Interestingly, the documentation at http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/I65012.html
> lists variant:0/revision:4 as the reported values for both r2p0 and r1p0
> and it does not list any core having variant:0/revision:5.
Heh, interesting.
- Felix
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