[PATCH] clk: xgene: Add SoC and PMD PLL clocks with v2 hardware

[Stephen Boyd]

On 12/16, Loc Ho wrote:
> @@ -41,6 +44,14 @@
>  
>  static DEFINE_SPINLOCK(clk_lock);
>  
> +static int xgene_clk_version(void)
> +{
> +	#define MIDR_EL1_VARIANT_MASK	0x00f00000
> +	u32 val = read_cpuid_id();
> +
> +	return (val & MIDR_EL1_VARIANT_MASK) == 0 ? 1 : 2;
> +}

This is very odd. It means that this file can't be test compiled
on non-arm64 platforms. It would be better to express the v1 vs.
v2 difference through DT compatible strings so that the driver
doesn't rely on reading the midr.

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