[PATCH] arm64: dts: Add L2 cache node to msm8916
Andy Gross
andy.gross at linaro.org
Fri Jan 8 20:41:30 PST 2016
On Fri, Jan 08, 2016 at 03:57:09PM -0800, Stephen Boyd wrote:
> The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the
> dtsi file so that the cache hierarchy can be probed.
>
> Cc: <devicetree at vger.kernel.org>
> Signed-off-by: Stephen Boyd <sboyd at codeaurora.org>
> ---
Reviewed-by: Andy Gross <andy.gross at linaro.org>
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