[PATCH] ARM: net: bpf: fix zero right shift

David Miller davem at davemloft.net
Tue Jan 5 22:32:29 PST 2016


From: Rabin Vincent <rabin at rab.in>
Date: Tue,  5 Jan 2016 18:34:04 +0100

> The LSR instruction cannot be used to perform a zero right shift since a
> 0 as the immediate value (imm5) in the LSR instruction encoding means
> that a shift of 32 is perfomed.  See DecodeIMMShift() in the ARM ARM.
> 
> Make the JIT skip generation of the LSR if a zero-shift is requested.
> 
> This was found using american fuzzy lop.
> 
> Signed-off-by: Rabin Vincent <rabin at rab.in>

Applied, thanks.



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