[PATCH v3 7/7] arm64: dts: r8a7795: Add CA53 L2 cache-controller node

Sudeep Holla sudeep.holla at arm.com
Tue Feb 16 01:46:11 PST 2016



On 16/02/16 07:12, Geert Uytterhoeven wrote:
> Hi Dirk,
>
> On Tue, Feb 16, 2016 at 7:44 AM, Dirk Behme <dirk.behme at de.bosch.com> wrote:

[...]

>>
>> As we don't have any CA53 in the device tree yet, and it was rejected to add
>> it, I'd think that we don't want these unused entries at the moment.
>
> This is a preparatory step for adding the SYSC PM Domains.
>
>> I'd propose to add the CA53 entries, first. And then add their L2 cache
>> entries.
>>
>> Based on the outcome of the discussion for the CA57 we have to see if we
>> want to add the unused cache-unified and cache-level, then, too.
>
> These are specified by ePAPR, as I said before.
> Remember, DT describes the hardware, not what Linux (or any other OS) is
> using.
>

I completely agree and I mentioned the same in the other email.

-- 
Regards,
Sudeep



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