[PATCH] PCI: Xilinx NWL PCIe: Updating device tree documentation with prefetchable memory space

Bharat Kumar Gogada bharat.kumar.gogada at xilinx.com
Tue Aug 30 03:46:18 PDT 2016


> Subject: Re: [PATCH] PCI: Xilinx NWL PCIe: Updating device tree documentation
> with prefetchable memory space
>
> On Tue, Aug 09, 2016 at 07:30:09PM +0530, Bharat Kumar Gogada wrote:
> > Updating device tree documentation with prefetchable memory sapce.
> > Configuration space shifted to 64-bit address space.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharatku at xilinx.com>
> > ---
> >  Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
>
> Acked-by: Rob Herring <robh at kernel.org>

Thanks Rob


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