[PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller

Mirza Krak mirza.krak at gmail.com
Mon Aug 29 00:38:39 PDT 2016


2016-08-26 9:25 GMT+02:00 Jon Hunter <jonathanh at nvidia.com>:
>
> On 26/08/16 05:53, Mirza Krak wrote:
>
> ...
>
>>> I have an idea which is following:
>>>
>>> gmi at 70090000 {
>>>          status = "okay";
>>>          #address-cells = <2>;
>>>          #size-cells = <1>;
>>>          ranges = <4 0 0x48000000 0x00040000>;
>>>
>>>          cs4 {
>>>                  compatible = "simple-bus";
>>>                  #address-cells = <2>;
>>>                  #size-cells = <1>;
>>>                  ranges;
>>>
>>>                  nvidia,snor-cs = <4>;
>>>                  nvidia,snor-mux-mode;
>>>                  nvidia,snor-adv-inv;
>>>
>>>                  can at 0 {
>>>                          compatible = "nxp,sja1000";
>>>                          reg = <4 0 0x100>;
>>>                          ...
>>>                  };
>>>
>>>
>>>                  can at 40000 {
>>>                          compatible = "nxp,sja1000";
>>>                          reg = <4 0x40000 0x100>;
>>>                          ...
>>>                  };
>>>          };
>>> };
>>>
>>> Do not know if above will work at all (not able to test at current
>>> location), anyway I will play around with it some more and get back to
>>> you.
>>
>> Gave above a test run and it works like a charm. Are we happy with that?
>
> Does it not work with #address-cells = <1>? Seems odd to have the cs in
> the reg for the device.
>

No it does not work with #address-cells = <1> with the current
structure that we have.

With #address-cells = <2>, we can state that this device is on
chip-select 4 and on this specific offset of chip-select 4 (that is
the second address cell). I do not see how we can specify this with
only one address cell.

And is it really that odd? Looking at other drivers they all use the
same metod, even the arm,pl172 that you where referring to as a base
for our implementation.

Best Regards
Mirza



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