[PATCH] ARM: imx6: enable WAIT mode hardware workaround for imx6sx

[Shawn Guo]

On Tue, Aug 23, 2016 at 01:03:20AM +0800, Anson Huang wrote:
> Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode,
> without this bit set, if there is pending interrupt during
> ARM platform entering WAIT mode without power gating, cache
> data will be corrupted, this is a hardware workaround for WAIT
> mode and must be enabled.
> 
> Signed-off-by: Anson Huang <Anson.Huang at nxp.com>
> ---
>  arch/arm/mach-imx/cpuidle-imx6sx.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c
> index 3c6672b..41cdce6 100644
> --- a/arch/arm/mach-imx/cpuidle-imx6sx.c
> +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c
> @@ -90,6 +90,7 @@ static struct cpuidle_driver imx6sx_cpuidle_driver = {
>  
>  int __init imx6sx_cpuidle_init(void)
>  {
> +	imx6q_set_int_mem_clk_lpm(true);

It might be the time to rename the function to imx6_set_int_mem_clk_lpm()
with a beforehand patch.

Shawn

>  	imx6_enable_rbc(false);
>  	/*
>  	 * set ARM power up/down timing to the fastest,
> -- 
> 1.9.1
> 
> 
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