[PATCH 6/7] arm64: xen: Enable user access before a privcmd hvc call

Julien Grall julien.grall at arm.com
Mon Aug 15 02:58:15 PDT 2016


Hi Catalin,

I have CCed Stefano who is maintaining the Xen ARM code in Linux.

On 12/08/2016 17:27, Catalin Marinas wrote:
> Privcmd calls are issued by the userspace. The kernel needs to enable
> access to TTBR0_EL1 as the hypervisor would issue stage 1 translations
> to user memory via AT instructions. Since AT instructions are not
> affected by the PAN bit (ARMv8.1), we only need the explicit
> uaccess_enable/disable if the TTBR0 PAN option is enabled.
>
> Cc: Julien Grall <julien.grall at arm.com>
> Cc: Will Deacon <will.deacon at arm.com>
> Cc: James Morse <james.morse at arm.com>
> Cc: Kees Cook <keescook at chromium.org>
> Signed-off-by: Catalin Marinas <catalin.marinas at arm.com>

Reviewed-by: Julien Grall <julien.grall at arm.com>

Regards,

> ---
>  arch/arm64/xen/hypercall.S | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S
> index 329c8027b0a9..4c509f4f4dcc 100644
> --- a/arch/arm64/xen/hypercall.S
> +++ b/arch/arm64/xen/hypercall.S
> @@ -91,6 +91,24 @@ ENTRY(privcmd_call)
>  	mov x2, x3
>  	mov x3, x4
>  	mov x4, x5
> +#ifdef CONFIG_ARM64_TTBR0_PAN
> +	/*
> +	 * Privcmd calls are issued by the userspace. The kernel needs to
> +	 * enable access to TTBR0_EL1 as the hypervisor would issue stage 1
> +	 * translations to user memory via AT instructions. Since AT
> +	 * instructions are not affected by the PAN bit (ARMv8.1), we only
> +	 * need the explicit uaccess_enable/disable if the TTBR0 PAN option is
> +	 * enabled.
> +	 */
> +	uaccess_enable x6, x7, x8
> +#endif
>  	hvc XEN_IMM
> +
> +#ifdef CONFIG_ARM64_TTBR0_PAN
> +	/*
> +	 * Disable userspace access from kernel once the hyp call completed.
> +	 */
> +	uaccess_disable x6
> +#endif
>  	ret
>  ENDPROC(privcmd_call);
>
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>

-- 
Julien Grall



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