[PATCH] clk: sunxi: Accept a greater rate when setting a parent clock

[Jean-Francois Moine]

On Thu, 14 Apr 2016 19:24:00 +0200
Maxime Ripard <maxime.ripard at free-electrons.com> wrote:

> > >> That being said, we had a similar discussion for SPI around a month
> > >> ago where we wanted a rate strictly lower than the requested one. I
> > >> guess it's time to add a flag to tell how you want to round.
> > > 
> > > You are right, I just removed half of the constraint, but I still wonder
> > > why does this sequence introduced by the commit 862b728387aef3a37
> > > (clk: sunxi: factors: automatic reparenting support) do
> > > 	"provide the fastest rate <= rate"
> > > instead of
> > > 	"provide the closest rate" ?
> > > 
> > > Emilio?
> > 
> > Overclocking components is usually not a good default in my opinion. I
> > don't recall at the moment if there was some other justification apart
> > from playing it safe.
> 
> Yeah, I'd agree, it should be the exception rather than the norm. In
> some cases that are very timings sensitive (audio or video), we
> probably want to enforce something as close as possible to the
> expected rate, even if it trips above the rate.
> 
> For all the other, I'd prefer to keep the current behaviour.

OK, then, as I have no solution for this clock, there will be no audio
44.1KHz from the H3...

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