[PATCH 2/3] clk: ti: amx3xx: limit the maximum frequency of DPLLs based on spec

Tero Kristo t-kristo at ti.com
Wed Apr 13 05:51:29 PDT 2016

On 04/01/2016 10:28 PM, Stephen Boyd wrote:
> On 03/16, Tero Kristo wrote:
>> AM33xx/AM43xx devices use the same DPLL IP blocks, which only support
>> maximum rate of 1GHz [1] for the default and 2GHz for the low-jitter type
>> DPLLs [2]. Reflect this limitation in the DPLL init code by adding the
>> max-rate parameter based on the DPLL types.
>> [1] Functional, integration & test specification for GS70 ADPLLS, Rev 1.0-01
>> [2] Functional, integration & test specification for GS70 ADPLLLJ, Rev 0.8-02
>> Signed-off-by: Tero Kristo <t-kristo at ti.com>
>> Cc: Nishanth Menon <nm at ti.com>
>> Cc: Tomi Valkeinen <tomi.valkeinen at ti.com>
>> Cc: Lokesh Vutla <lokeshvutla at ti.com>
>> ---
> Acked-by: Stephen Boyd <sboyd at codeaurora.org>
> Or I can apply these two targeting 4.7 if you like.

Yea I am fine with this. Want to pick up the old patch from Grygorii also?


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