[PATCH v2 4/5] dmaengine: qcom: bam_dma: use correct pipe FIFO size

Vinod Koul vinod.koul at intel.com
Tue Apr 5 16:45:52 PDT 2016


On Wed, Apr 06, 2016 at 01:56:21AM +0300, Stanimir Varbanov wrote:
> The pipe fifo size register must instruct the bam hw
> how many hw descriptors can be pushed to fifo. Currently
> we isntruct the hw with 32KBytes but wrap the tail in
    ^^^^^^^^^
typo 

-- 
~Vinod



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