[PATCH 7/8] nvmem: rockchip-efuse: describe the usage of eFuse
Srinivas Kandagatla
srinivas.kandagatla at linaro.org
Wed Sep 30 05:56:36 PDT 2015
From: ZhengShunQian <zhengsq at rock-chips.com>
This patch add the bindings document of rockchip eFuse driver.
Cc: Srinivas Kandagatla <srinivas.kandagatla at linaro.org>
Cc: Heiko Stuebner <heiko at sntech.de>
Signed-off-by: ZhengShunQian <zhengsq at rock-chips.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla at linaro.org>
---
.../devicetree/bindings/nvmem/rockchip-efuse.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
new file mode 100644
index 0000000..8f86ab3
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -0,0 +1,38 @@
+= Rockchip eFuse device tree bindings =
+
+Required properties:
+- compatible: Should be "rockchip,rockchip-efuse"
+- reg: Should contain the registers location and exact eFuse size
+- clocks: Should be the clock id of eFuse
+- clock-names: Should be "pclk_efuse"
+
+= Data cells =
+Are child nodes of eFuse, bindings of which as described in
+bindings/nvmem/nvmem.txt
+
+Example:
+
+ efuse: efuse at ffb40000 {
+ compatible = "rockchip,rockchip-efuse";
+ reg = <0xffb40000 0x20>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cru PCLK_EFUSE256>;
+ clock-names = "pclk_efuse";
+
+ /* Data cells */
+ cpu_leakage: cpu_leakage {
+ reg = <0x17 0x1>;
+ };
+ };
+
+= Data consumers =
+Are device nodes which consume nvmem data cells.
+
+Example:
+
+ cpu_leakage {
+ ...
+ nvmem-cells = <&cpu_leakage>;
+ nvmem-cell-names = "cpu_leakage";
+ };
--
1.9.1
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