[PATCH v3 2/2] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support

Vladimir Zapolskiy vladimir_zapolskiy at mentor.com
Mon Sep 21 07:00:33 PDT 2015

On 17.09.2015 01:18, Russell King - ARM Linux wrote:
> On Wed, Sep 16, 2015 at 02:56:57PM -0700, Doug Anderson wrote:
>> Yes, I'd expect 100kHz and 400kHz.
>> I agree that 50ms is non-trivial, but it's also not something you're
>> doing lots of.  I'd expect that the EDID is read over this channel at
>> cable plugin time and then not used much after that.  Adding an extra
>> 40ms (10ms vs 50ms) before we can access the TV doesn't seem terrible
>> for compatibility.
>> Doing a quick scan for what others in mainline do:
>> A few can be found with:
>> $ git grep -A3 hdmiddc | grep clock-freq
>> arch/arm/boot/dts/stihxxx-b2120.dtsi-
>> clock-frequency = <100000>;
>> arch/arm/boot/dts/tegra30-apalis.dtsi-          clock-frequency = <100000>;
>> arch/arm/boot/dts/tegra30-beaver.dts-           clock-frequency = <100000>;
>> arch/arm/boot/dts/tegra30-colibri.dtsi-         clock-frequency = <100000>;
> This is a sure way to propagate a bug.
> I said in a previous email that you need to check the HDMI and CEA
> specs.  I've done this, and HDMI 1.3a specifies a maximum SCL clock
> rate of 100kHz.
> So that's settled then.  100kHz is must be.  Using 400kHz is out of
> specification.

FYI I've managed to measure SCL on iMX6, fast mode stands for 333KHz and
standard mode stands for 100KHz, therefore I'll set the latter mode.

With best wishes,

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