[PATCH] EDAC: Add AMD Seattle SoC EDAC
guohanjun at huawei.com
Thu Oct 22 18:38:48 PDT 2015
On 2015/10/21 17:35, Borislav Petkov wrote:
> On Wed, Oct 21, 2015 at 09:55:43AM +0800, Hanjun Guo wrote:
>> So I think the meaning of those error register is the same, but the way
>> of handle it may different from SoCs, for single bit error:
>> - SoC may trigger a interrupt;
>> - SoC may just keep silent so we need to scan the registers using poll
>> For Double bit error:
>> - SoC may also keep silent
>> - Trigger a interrupt
>> - Trigger a SEI (system error)
>> Any suggestion to cover those cases?
> Well, I guess we can implement all those and have them configurable
> in the sense that a single driver loads, it has all functionality and
> dependent on the vendor detection, it does only what the vendor wants
> like trigger an interrupt or remain silent or ...
Hmm, so we need to keep the DT bindings for different SoCs which
have different ways of handling the errors.
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