[PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Maxime Ripard
maxime.ripard at free-electrons.com
Thu Oct 22 02:14:10 PDT 2015
On Thu, Oct 22, 2015 at 10:57:45AM +0200, Jean-Francois Moine wrote:
> On Thu, 22 Oct 2015 10:47:35 +0200
> Maxime Ripard <maxime.ripard at free-electrons.com> wrote:
>
> > Not really. The uart0 reset is the bit 16, in the reset register 4.
> >
> > 4 * 32 + 16 = 44.
> >
> > Not 112, but still not 208 either.
>
> The registers are numbered 1..5, then
>
> (4 - 1) * 32 + 16 = 112
Not on my version, and even then, UARTs are on the last reset
register, which would still make 144.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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