[PATCH v4 5/5] iommu/arm-smmu: describe the limitation of #iommu-cells

[Zhen Lei]

Only support #iommu-cells = <1>.

Signed-off-by: Zhen Lei <thunder.leizhen at huawei.com>
---
 Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
index 947863a..4845d44 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
@@ -5,6 +5,12 @@ revisions, replacing the MMIO register interface with in-memory command
 and event queues and adding support for the ATS and PRI components of
 the PCIe specification.

+Please read ./iommu.txt first, here list something special as below:
+
+** SMMUv3 limited properties:
+- #iommu-cells      : fixed to <1>. The pci root device is a special case,
+                      its IDs can be omitted in dts, seems #iommu-cells = <0>.
+
 ** SMMUv3 required properties:

 - compatible        : Should include:
--
2.5.0