[PATCH v2 2/2] irqchip/gic-v2m: Add support for multiple MSI frames
Suravee Suthikulanit
suravee.suthikulpanit at amd.com
Wed Oct 14 07:13:54 PDT 2015
Hi Marc,
On 10/14/2015 6:27 AM, Marc Zyngier wrote:
> The GICv2m driver is so far limited to a single MSI frame, but
> nothing prevents an implementation from having several of them.
>
> This patch expands the driver to enumerate all frames, keeping
> the first one as the canonical identifier for the MSI domains.
>
> Tested-by: Duc Dang <dhdang at apm.com>
> Signed-off-by: Marc Zyngier <marc.zyngier at arm.com>
> ---
> drivers/irqchip/irq-gic-v2m.c | 124 ++++++++++++++++++++++++++----------------
> 1 file changed, 78 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
> index bf9b3c0..87f8d10 100644
> --- a/drivers/irqchip/irq-gic-v2m.c
> +++ b/drivers/irqchip/irq-gic-v2m.c
> @@ -50,8 +50,12 @@
> /* List of flags for specific v2m implementation */
> #define GICV2M_NEEDS_SPI_OFFSET 0x00000001
>
> +static LIST_HEAD(v2m_nodes);
> +static DEFINE_SPINLOCK(v2m_lock);
> +
> struct v2m_data {
> - spinlock_t msi_cnt_lock;
> + struct list_head entry;
> + struct device_node *node;
Would it be better if we use struct fwnode_handle * here instead. I
noticed that later on, this is also used as of_node_to_fwnode(v2m->node)
in several places. Also, this would need to change anyways when we
introducing ACPI support (see here https://lkml.org/lkml/2015/10/13/846).
Thanks,
Suravee
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