[PATCH 2/3] dts: Updated devicetree bindings for Zynq 7000 platform
Michal Simek
michal.simek at xilinx.com
Wed Oct 14 00:03:23 PDT 2015
On 10/14/2015 04:50 AM, Moritz Fischer wrote:
> Hi Michal,
>
> On Mon, Oct 12, 2015 at 2:32 AM, Michal Simek <michal.simek at xilinx.com> wrote:
>> On 10/09/2015 12:45 AM, Moritz Fischer wrote:
>>> Added addtional bindings required for FPGA Manager operation
>>> of the Xilinx Zynq Devc configuration interface.
>>>
>>> Signed-off-by: Moritz Fischer <moritz.fischer at ettus.com>
>>> ---
>>> arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
>>> index dc0457e..1a5220e 100644
>>> --- a/arch/arm/boot/dts/zynq-7000.dtsi
>>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
>>> @@ -294,6 +294,11 @@
>>> devcfg: devcfg at f8007000 {
>>> compatible = "xlnx,zynq-devcfg-1.0";
>>> reg = <0xf8007000 0x100>;
>>> + interrupt-parent = <&intc>;
>>> + interrupts = <0 8 4>;
>>> + clocks = <&clkc 12>;
>>> + clock-names = "ref_clk";
>>> + syscon = <&slcr>;
>>> };
>>>
>>> global_timer: timer at f8f00200 {
>>>
>>
>> This patch should go via arm-soc tree. That's why please remove it from
>> this patchset.
>
> Just to clarify, you want this as a separate patch?
yes when binding is ACKed.
Thanks,
Michal
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