[PATCH v2 03/10] drm/hisilicon: Add hisilicon DRM master driver

[Daniel Vetter]

On Mon, Nov 30, 2015 at 11:25:28AM -0600, Rob Herring wrote:
> On Mon, Nov 30, 2015 at 08:46:03AM +0100, Daniel Vetter wrote:
> > On Sat, Nov 28, 2015 at 03:25:35PM +0000, Emil Velikov wrote:
> > > Hi Xinliang,
> > > 
> > > On 28 November 2015 at 10:38, Xinliang Liu <xinliang.liu at linaro.org> wrote:
> > > > Add DRM master driver for hi6220 SoC which used in HiKey board.
> > > > Add dumb buffer feature.
> > > > Add prime dmabuf feature.
> > > >
> 
> > > > +static int hisi_gem_cma_dumb_create(struct drm_file *file,
> > > > +                                   struct drm_device *dev,
> > > > +                                   struct drm_mode_create_dumb *args)
> > > > +{
> > > > +       int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
> > > > +
> > > > +       /* mali gpu need pitch 8 bytes alignment for 32bpp */
> > > > +       args->pitch = roundup(min_pitch, 8);
> > > > +
> > > I'm not sure you want this kind of dependency of an out of tree driver
> > > upstream. If this is some limitation on the display engine so be it,
> > > but tailoring things for an external module seems like a very bad
> > > idea.
> > 
> > Yup, nacked. dumb_create is for dumb buffers, not rendering. Mali needs to
> > go upstream to fix this ...
> 
> I believe this is copy-n-paste from Rockchip driver.
> 
> I'm curious why there is not a common interface for rendering buffers at 
> least for systems without graphics memory like most ARM systems. Are the 
> requirements of GPU so diverse that things like pitch alignment can't be 
> parameterized?

pitch requirements is generally the least worry. The real fun starts with
tiling modes and how all that stuff interacts. Atm the only solution we
have is "userspace needs to know" in form of either gralloc (android) or
gbm (cros, desktop linux). There have been ideas to for describing buffer
limits, but nothing concrete yet.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch